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6.2.2 Cursor Home
DB7 DB6
DB5
DB4
DB3 DB2
DB1
DB0
0 0 0 0 0 0 1
RS=0, R/W=0 02H to 03H
This instruction
(1) Clears the contents of the address counter (ACC) to 00H.
(2) Sets the address counter (ACC) to point to the DD-RAM.
(3) Sets the display for zero character shift (returns original position).
(4) If the cursor is displayed, moves the left most character in the top line (upper line).
6.2.3 Entry Mode Set
DB7
DB6
DB5
DB4
DB3 DB2 DB1 DB0
0 0 0 0 0 1 I/D
RS=0, R/W=0 04H to 07H
The I/D bit selects the way in which the contents of the address counter (ACC) are modified after every
access to DD-RAM or CG-RAM.
I/D=1: The address counter (ACC) is incremented.
I/D=0: The address counter (ACC) is decremented.
The S bit enable display shift, instead of cursor shift , after each write or read to the DD-RAM.
S=1: Display shift enabled.
S=0: Cursor shift enabled.
The direction in which the display is shifted is opposite in sense to that of the cursor.
For example, if S=0 and I/D=1, the cursor would shift one character to the right after a MPU writes to
DD-RAM. However if S=1 and I/D=1, the display would
shift one character to the
left and the cursor would
maintain its position on panel.
The cursor will already be shifted in the direction selected by I/D during reads of the DD-RAM,
irrespective of the value of S. Similarly reading and writing the CG-RAM always shift the cursor.
Also both lines are shifted simultaneously.
Table-14 Cursor move and Display shift by the “Entry Mode Set”
I/D S
After writing DD-RAM data After reading DD-RAM data
0 0 The cursor moves one character to the
The cursor moves one character
left.
to the left.
1 0 The cursor moves one character to the
The cursor moves one character to
right.
the right.
0 1 The display shifts one character to the
The cursor moves one character to
right without cursor’s move.
the left.
1 1 The display shifts one character to the left
The cursor moves one character
without cursor’s move.
to the right.
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